1. Field of the Invention
The present invention is generally in the field of electronic arts. More specifically, the invention is in the field of packaging of electronic components and devices.
2. Background Art
As electronic devices become more integrated with increased functionality and higher levels of performance, the complexity of the packaging structures, for example, die package substrates and circuit boards (each phrase “die package substrate” and “circuit board” is also generally referred to as a “substrate” in the present application), that are used to effectuate signal transmission has grown. As a further result of the increase in functionality and performance, the density of interconnects used in die package substrates and circuit boards has increased as well. Progress towards greater circuit density and higher performance has been achieved in part through the introduction of multi-layered die package substrates and circuit boards and the use of vias in these die package substrates and circuit boards.
Vias are electrically conductive structures extending through a die package substrate or a circuit board. As known in the art, a via provides a conductive path for a signal traveling from one surface to another surface of a dielectric layer, or between different surfaces in a multi-layered die package substrate or circuit board. Such a path is typically established by depositing a layer of conductive material onto the inner wall of a via hole.
In conventional techniques, the conductive material on the inner wall of the via is protected during later patterning of the die package substrate or circuit board surface, by introduction of a photoresist plug over the via hole. Reliance on a photoresist plug during patterning results in retention on the die package substrate or circuit board surface of a perimeter region made up of a conductive material that surrounds the opening of each via hole. These perimeter regions, also referred to as via pads, are undesirable for a number of reasons. For example, via pads occupy space otherwise allocable to interconnect traces which connect circuit components, and they also present an obstacle to flexibility in designing and patterning the interconnect traces and make signal routing less efficient.
In a conventional padded via, the via pad may represent a large percentage, for example more than 60%, of the total lateral area consumed by a via. Elimination of the via pad represents a substantial decrease in the surface footprint of the via, with corresponding enhancements in both available surface space and interconnect routing flexibility and efficiency. Simply stated, reduction or elimination of via pads makes possible significant improvements in the functionality and performance of existing die package substrates and circuit boards. Moreover, smaller die package substrates and circuit boards are possible, which result in flexibility in system design and substantial cost savings.